/*******************************************************
 * InterLeaveLL_SR_Product.h
 *
 *  Created on: 2023Äê4ÔÂ28ÈÕ
 *      Author: yangch
 *******************************************************/

#ifndef CTRL_LIB_H_
#define CTRL_LIB_H_

#define  OPENLOOP_ENABLE     (0) //0:close loop 1:open loop
#define  CURR_LIMIT_ENABLE   (0) //0:current limit disable 1:current limit enable
#define  VOUT_LIMIT_ENABLE   (0) //0:Vout Limit disable    1:vout

#define VOLT_SLEW_STEP    ((int32_t)(4))
#define CURR_SLEW_STEP    ((int32_t)(10))

//
#define CTRL_VLOOP_CNT    	(16)
#define CTRL_RESOANANT_CNT	(16)

#define SR_VOLT_BASE_ADC            ((int32_t)(2369))  //42V/0.5V
#define SR_CURR_BASE_ADC            ((int32_t)(217))   //7A/1.0A
#define SR_CURR_K_Q11               (CONSTIoutScaleQ11)
#define SR_VOLT_K_Q11               (CONSTVoutScaleQ11 * 2)

/************controller configuration**************************************/
//
#define VoutLPFCoff_A_Q16                       ((int32_t)(58982))//((int32_t)(41177))//((int32_t)(20588)) //5KHZ
#define VoutLPFCoff_B_Q16                       ((int32_t)(6553))//((int32_t)(24358))//((int32_t)(44947)) //

#define IoutLPFCoff_A_Q16                       ((int32_t)(41177))//((int32_t)(20588))//((int32_t)(20588)) //5KHZ
#define IoutLPFCoff_B_Q16                       ((int32_t)(24358))//((int32_t)(44947))//((int32_t)(44947)) //

#define VinLPFCoff_A_Q16                        ((int32_t)(5147))//((int32_t)(20588)) //5KHZ
#define VinLPFCoff_B_Q16                        ((int32_t)(60388))//((int32_t)(44947)) //

#define PriCurrLPFCoff_A_Q16                    ((int32_t)(5147)) //5KHZ
#define PriCurrLPFCoff_B_Q16                    ((int32_t)(60388)) //

#define PriCurrCtrlCoff_A_Q16                   ((int32_t)(2)) //IQ16(0.001)
#define CTRL_KP_GAIN_Q16                        ((int32_t)(1658))//IQ16(0.0253)
#define CTRL_KP_OFFSENT_Q16                     ((int32_t)(-2795635))//IQ16(-42.158)

#define VOLTAGE_MAX_ERROR                       ((int32_t)(320))   //5V
#define VOLTAGE_MIN_ERROR                       ((int32_t)(-320))  //-5V

#define CURRENT_MAX_ERROR                       ((int32_t)(205))   //10A
#define CURRENT_MIN_ERROR                       ((int32_t)(-205))  //-10A

#define BURST_ENABLE_VALUE                      ((int32_t)(200))
#define SR_CURR_ENABLE_VALUE                    ((int32_t)(814))  //18.75A@30%
#define SR_CURR_DISABLE_VALUE                   ((int32_t)(678))  //15.625A@25%

#define VLOOP_CTRL_MAX                          (96000)             //80KHZ
#define VLOOP_CTRL_MIN                          (21942)//(25600)             //300KHZ
#define ILOOP_CTRL_MAX                          (96000)             //80KHZ
#define ILOOP_CTRL_MIN                          (21942)//(25600)             //300KHZ
#define FRE_CTRL_MAX                            (96000)             //80KHZ
#define BURST_CTRL_VALUE                        (25600)//(30720)             //250KHZ    
#define RESANANT_FRE                            ((int32_t)(56888))   //135KHZ
#define SR_TIME_LEFT_RESANT                     ((int32_t)(25367))   //resanant time - 400ns
#define SR_TIME_RIGHT_RESANT                    ((int32_t)(2308))    //300ns


#define UINTx_DT_UP_MIN                         (2307L) //(1923L)     //250ns
#define UINTx_DT_DOWN_MIN                       (2307L)//(1923L)     //250ns
#define UINTx_DT_UP_MAX                         (2307L)//(1923L)     //500ns
#define UINTx_DT_DOWN_MAX                       (2307L)//(1923L)     //500ns



#define PriCurrCtrlMAX                          ((int32_t)(26214))    //0.25
#define PriCurrCtrlMIN                          ((int32_t)(-26214))   //-0.25
#define DelatPhaseMAX                           ((int32_t)(11538))    //1.5us

#define CURRENT_SET_MAX_Q0                      ((int32_t)(2802))  //((int32_t)(3080))     //
#define CURRENT_SET_MIN_Q0                      ((int32_t)(559))

#define UINT1_PRD_VALUE                         ((uint32_t)(30720L))     //250KHZ

//SR A HW enable
#define SRA_HAL_ENABLE     SET_REG32_BIT(CM_GPIO->PORRA , (1L << 5))
//SR A HW disable
#define SRA_HAL_DISABLE    SET_REG32_BIT(CM_GPIO->POSRA , (1L << 5))

//SR B HW enable
#define SRB_HAL_ENABLE     SET_REG32_BIT(CM_GPIO->PORRB , (1L << 10))

//SR B HW enable
#define SRB_HAL_DISABLE    SET_REG32_BIT(CM_GPIO->POSRB , (1L << 10))

#define HRPWM_PHASE2_ENABLE   (CLR_REG32_BIT(CM_EMB1->SOE,1))
#define HRPWM_PHASE2_DISABLE  (SET_REG32_BIT(CM_EMB1->SOE,1))

#define HRPWM_PAHSE1_ALL      (HRPWM_UNIT1 | HRPWM_UNIT5 | HRPWM_UNIT3)
#define HRPWM_PAHSE2_ALL      (HRPWM_UNIT6 | HRPWM_UNIT2 | HRPWM_UNIT4)
#define HRPWM_SR_ALL          (HRPWM_UNIT4 | HRPWM_UNIT3)

#define LLC_PWM_DISABLE_IDLEMODE_IMMD_ALL            (SET_REG32_BIT(CM_HRPWM_COMMON->SSTAIDLR, HRPWM_UNIT_ALL))   //imm
#define LLC_PWM_DISABLE_IDLEMODE_ALL                 (SET_REG32_BIT(CM_HRPWM_COMMON->SSTADIDLR, HRPWM_UNIT_ALL))
#define LLC_PWM_DISABLE_IDLEMODE_PHASEA              (SET_REG32_BIT(CM_HRPWM_COMMON->SSTADIDLR, HRPWM_PAHSE1_ALL))
#define LLC_PWM_DISABLE_IDLEMODE_PHASEB              (SET_REG32_BIT(CM_HRPWM_COMMON->SSTADIDLR, HRPWM_PAHSE2_ALL))

#define LLC_PWM_ENABLE_IDLEMODE_ALL                  (WRITE_REG32(CM_HRPWM_COMMON->SSTARUNR1, 0x0FFF))
#define LLC_PWM_ENABLE_IDLEMODE_ALL_NOT_SR           (WRITE_REG32(CM_HRPWM_COMMON->SSTARUNR1, 0x0F0F))
#define CHB_LLC_PWM_ENABLE_IDLEMODE_NOT_SR           (WRITE_REG32(CM_HRPWM_COMMON->SSTARUNR1, 0x0909))
#define LLC_PWM_ENABLE_IDLEMODE_PHASEA               (WRITE_REG32(CM_HRPWM_COMMON->SSTARUNR1, 0x0333))
#define LLC_PWM_ENABLE_IDLEMODE_PHASEA_NOT_SR        (WRITE_REG32(CM_HRPWM_COMMON->SSTARUNR1, 0x0303))
#define LLC_PWM_ENABLE_IDLEMODE_PHASEB               (WRITE_REG32(CM_HRPWM_COMMON->SSTARUNR1, 0x0CCC))
#define LLC_PWM_ENABLE_IDLEMODE_PHASEB_NOT_SR        (WRITE_REG32(CM_HRPWM_COMMON->SSTARUNR1, 0x0C0C))
#define ILLLC_HAL_SRDriverEnable                     (WRITE_REG32(CM_HRPWM_COMMON->SSTARUNR1, 0x00F0))
//#define ILLLC_HAL_SRDriverEnable                     (SET_REG32_BIT(CM_HRPWM_COMMON->SSTARUNR1, 0x0000))
#define ILLLC_HAL_SRDriverDisable                    (SET_REG32_BIT(CM_HRPWM_COMMON->SSTADIDLR, HRPWM_SR_ALL))


//controller parameter
//voltage loop parameter
typedef struct
{
    int32_t int32B0;
    int32_t int32B1;
    int32_t int32B2;
    int32_t int32A1;
    int32_t int32A2;
    int32_t int32X0;
    int32_t int32X1;
    int32_t int32X2;
    int32_t int32Y1;
    int32_t int32Y2;
    int32_t int32Y0;
    int32_t int32Y0_REM;
    int32_t int32Max;
    int32_t int32Min;
}ctrlloopDef;

typedef struct
{
    uint16_t    u16WorkEnableFlag         : 1;  //work enable flag
    uint16_t    u16SoftStartFinishFlag    : 1;  //soft start finish
    uint16_t    RSVD                      : 14; //RSVD
}SysFlagStructDef;

typedef union
{
    SysFlagStructDef bits;
    uint16_t   all;
}SysFlagUnionDef;

//
extern ctrlloopDef VloopCtrl;
extern ctrlloopDef CloopCtrl;
extern SysFlagUnionDef sysFlagRtdb;

//filter and calibration
extern int32_t  int32VoutFilterADCQ0;
extern int32_t  int32IoutFilterADCQ0;
extern int32_t  int32VinFilterADCQ0;
extern int32_t  int32PriCurr1FilterADCQ0;
extern int32_t  int32PriCurr2FilterADCQ0;


extern int32_t  int32VoutCalibADCQ0;
extern int32_t  int32IoutCalibADCQ0;
extern int32_t  int32VinCalibADCQ0;

extern uint16_t u16IsrDivdeCnt;
extern int32_t  s32SumPriCurr1;
extern int32_t  s32SumPriCurr2;
extern uint32_t  s32SRDuty;

extern int32_t  int32VoutSetADCQ0;//2708; //2395;//2708;  //base on ADC(48V * SCAL)
extern int32_t  int32IoutSetADCQ0;   //base on ADC(62.5A * SCAL)
extern int32_t  int32VoutSlewQ0; //used for controller;
extern int32_t  int32IoutSlewQ0; //used for controller;
extern int32_t  int32IoutLimitQ0;
extern int32_t  int32FreLimitQ0;   //default is 80KHZ
extern int32_t  int32FreLimitIndex;


extern uint16_t SysPowerONState;
extern uint16_t u16CtrlSrOpenIndex;

extern int32_t int32VoltErr;          //voltage loop error
extern int32_t int32CurrErr;          //current loop error

extern int32_t int32PriCurr1AdcBuffer[CTRL_RESOANANT_CNT];
extern int32_t int32PriCurr2AdcBuffer[CTRL_RESOANANT_CNT];

extern uint16_t u16BM_EnableCounter; 


extern int32_t int32PriCurr1Avage;
extern int32_t int32PriCurr2Avage;

extern int32_t int32PriCurrErr;       //resonant current error
extern int32_t int32PriCurrCtrlOut;   //

extern int32_t int32CtrlOut;
extern int32_t int32EpwmPrdUpdate;

extern int32_t int32P1Phase;          //P1 phase shift
extern int32_t int32P2Phase;          //P2 Phase shift

//
extern uint16_t u16BurstModeFlag;
extern uint16_t u16SrModeFlag;
extern uint16_t u16SrModeFlagPre;
extern uint16_t u16OneTimeFlag;

extern void LLC_CTRL_Loop(void);




#endif
